IEEE/IEC 62050-2005
IEC/IEEE International Standard - VHDL Register Transfer Level (RTL) Synthesis
| Fecha edición: |
2005-07-31
Anulada
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|---|---|
| Fecha cancelación: | 2005-07-31 |
| Idiomas disponibles: | Inglés |
| Keywords: | hardware description language|logic synthesis|register transfer level (RTL)|very high speed integrated circuit hardware description language (VHDL) |
| Scope: | - Inactive-Withdrawn. Replaces IEEE Std 1076.6-2004. This document specifies a standard for use of very high-speed integrated circuit hardware description language (VHDL) to model synthesizable register-transfer level digital logic. A standard syntax and semantics for VHDL register-transfer level synthesis is defined. The subset of the VHDL language, which is synthesizable, is described, and nonsynthesizable VHDL constructs are identified that should be ignored or flagged as errors. |
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