IEEE/IEC 61691-4-2004
IEC/IEEE International Standard - Behavioural Languages - Part 4: Verilog(C) Hardware Description Language
| Fecha edición: |
2004-11-15
Anulada
|
|---|---|
| Fecha cancelación: | 2004-11-15 |
| Idiomas disponibles: | Inglés |
| Keywords: | computer|computer languages|digital systems|electronic systems|hardware|hardware description languages|hardware design|HDL|PLI|programming language interface|Verilog HDL|Verilog PLI|Verilog |
| Scope: | - Inactive-Withdrawn. The Verilog(R) Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language. |
| ICS: | |
| CTN: | |
|
Otras Relaciones |
Relaciona con IEEE 1364-2001 |










